Resistive memory integrated circuits represent data using an electrical resistance of a resistive memory element. One group of resistive memory technologies is Magnetic Random Access Memory (MRAM) technology. Another is Programmable Conductive Random Access Memory (PCRAM). These resistance memory technologies have the ability to provide non-volatile or semi-volatile random access memory devices which require no, or infrequent, refreshing.
MRAM technology operates by sensing the electrical resistance of a magneto-resistive memory element, where the resistance depends on a magnetization state of the memory element. When the resistive memory element is magnetized with a field oriented in a first direction, it represents a first stored logical state. When the element is magnetized with a field oriented in a second direction, it represents a second, different, logical state. The orientation of the magnetic field of the memory cell is altered by passing electrical currents through one or more conductors disposed in proximity to the magneto-resistive memory element.
It is known, for example, to use Magnetic Tunnel Junction (MTJ) devices as magneto-resistive memory elements. The resistance of an MTJ device depends on the level of quantum tunneling that occurs across a thin dielectric film interposed between two magnetic electrical conductors. One of the magnetic electrical conductors is referred to as a “pinned layer” and has a relatively high magnetic coercivity. The pinned layer has a magnetic field direction fixed in a first orientation. The other magnetic electrical conductor is referred to as a “sense layer” (or “programmed layer”). The magnetic coercivity of the sense layer is low, as compared with that of the pinned layer, and the sense layer is subject to magnetization and re-magnetization to change the orientation of its magnetic field direction during operation of the MRAM device.
When the sense layer is magnetized to have a magnetic field direction parallel to that of the pinned layer (the “easy” direction), the electrical resistance of the device has a first value. When the sense layer is magnetized to have a magnetic field direction anti-parallel to that of the pinned layer (the “hard” direction), the electrical resistance of the device has a second value. The two values of electrical resistance are used to represent two binary values, and thus store a binary digit (bit) of data. Toggling the sense layer magnetization between the easy and hard directions represents toggling between bit states.
A typical MRAM device includes many memory elements along with bit and word lines and addressing and driving circuitry. Some MRAM devices include access transistors adapted to disconnect each memory cell from the word and/or bit lines except when the particular memory cell is being read. This architecture produces reliable and fast data access at the expense of reduced storage density. In an alternative “crosspoint” architecture, MRAM memory elements are directly connected between word and bit lines, without access transistors. This approach increases data density at the expense of relatively more difficult data state sensing operations and consequently slower data access.
It is desirable to have a resistive memory device with both high access speed and high storage density.